In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Due to the large geometry of through-silicon-vias (TSVs) and their connections to the power grid, significant current crowding can occur in 3D ICs. Prior works model TSVs and pow...
Based on the analysis of four case vignettes the architecture and design principles of international information systems are explored. A two-dimensional topology
With the increasing number of cars on the road, longer commutes, and the proliferation of complex information and entertainment features, there is a greater need for careful inter...
David M. Krum, Dietrich Manstetten, Clifford Nass,...
A fully asynchronous implementation of the ARM microprocessor has been developed in order to investigate the potential of asynchronous logic for low-power applications. The work d...
Stephen B. Furber, P. Day, Jim D. Garside, N. C. P...