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DAC
2012
ACM
13 years 9 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
DAC
2012
ACM
13 years 9 months ago
Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs
Due to the large geometry of through-silicon-vias (TSVs) and their connections to the power grid, significant current crowding can occur in 3D ICs. Prior works model TSVs and pow...
Xin Zhao, Michael Scheuermann, Sung Kyu Lim
ECIS
2001
15 years 8 months ago
An Object Oriented Architecture Model for International Information Systems? Exploring a Possible Approach
Based on the analysis of four case vignettes the architecture and design principles of international information systems are explored. A two-dimensional topology
Hans P. Lehmann
CHI
2007
ACM
16 years 7 months ago
Taking CHI for a drive: interaction in the car
With the increasing number of cars on the road, longer commutes, and the proliferation of complex information and entertainment features, there is a greater need for careful inter...
David M. Krum, Dietrich Manstetten, Clifford Nass,...
COMPCON
1994
IEEE
15 years 10 months ago
AMULET1: A Micropipelined ARM
A fully asynchronous implementation of the ARM microprocessor has been developed in order to investigate the potential of asynchronous logic for low-power applications. The work d...
Stephen B. Furber, P. Day, Jim D. Garside, N. C. P...