We discuss a vision of and work in progress on a collaborative engineering environment, the Collaborative Design Studio, being developed at the Geometric and Intelligent Computing...
Jonathan Sevy, Vera Zaychik, Thomas T. Hewett, Wil...
In order to address the complexities of SoC design, rigorous development methods and automated tools are required. This paper presents an approach to formal verification using mod...
In this paper we describe techniques used to move from a wide variety of speculative concepts to three working prototypes of potentially commercial audiophotography products. Stag...
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
In this paper we outline a typology, which will be useful for those engaged in the design and customization of information systems in healthcare. Drawing on ethnographic case stud...