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TC
2011
15 years 1 months ago
Maximizing Spare Utilization by Virtually Reorganizing Faulty Cache Lines
—Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Since a large fraction of chip area is devoted to on-...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
DAC
1999
ACM
15 years 11 months ago
Panel: What is the Proper System on Chip Design Methodology
ion model or flexible PCB solutions cannot offer a valid solution for the next millinium SoCs . James G. Dougherty, Integrated Systems Silicon LTD, Belfast, Northern Ireland ISS an...
Richard Goering, Pierre Bricaud, James G. Doughert...
COMCOM
2006
178views more  COMCOM 2006»
15 years 6 months ago
SIP-based MIP6-MANET: Design and implementation of mobile IPv6 and SIP-based mobile ad hoc networks
In this paper, we designed and implemented an integrated wireless system, namely a SIP-based MIP6-MANET system. This SIP-based MIP6MANET system is an integration and implementatio...
Yuh-Shyan Chen, Yun-Hsuan Yang, Ren-Hung Hwang
ECIS
2003
15 years 8 months ago
Acting out the future: a process for envisionment
It is difficult to design innovative information and communication technologies to meet needs that will emerge from future interactions between users, technologies and their situa...
Jennie Carroll, Daniel Tobin
HOTNETS
2010
15 years 1 months ago
Using strongly typed networking to architect for tussle
Today's networks discriminate towards or against traffic for a wide range of reasons, and in response end users and their applications increasingly attempt to evade monitorin...
Chitra Muthukrishnan, Vern Paxson, Mark Allman, Ad...