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DAC
2000
ACM
16 years 7 months ago
An architecture-driven metric for simultaneous placement and global routing for FPGAs
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, con...
Yao-Wen Chang, Yu-Tsang Chang
PDP
2010
IEEE
16 years 1 months ago
SLA-driven Elastic Cloud Hosting Provider
—It is clear that Cloud computing is and will be a sea change for the Information Technology by changing the way in which both software and hardware are designed and purchased. I...
Josep Oriol Fito, Iñigo Goiri, Jordi Guitar...
DAC
2005
ACM
16 years 7 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
16 years 3 months ago
A code refinement methodology for performance-improved synthesis from C
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
Greg Stitt, Frank Vahid, Walid A. Najjar
CODES
2007
IEEE
16 years 1 months ago
Event-based re-training of statistical contention models for heterogeneous multiprocessors
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas