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ISQED
2003
IEEE
104views Hardware» more  ISQED 2003»
15 years 12 months ago
On-Chip Interconnect Inductance - Friend or Foe (Invited)
Inductance associated with on-chip wires can no longer be ignored as chip operation frequencies increase into GHz regime. Because the magnetic field propagates a very long range, ...
S. Simon Wong, C. Patrick Yue, Richard Chang, So-Y...
DAWAK
2009
Springer
15 years 11 months ago
Mining Violations to Relax Relational Database Constraints
Frequent constraint violations on the data stored in a database may suggest that the semantics of the represented reality is changing. In this work we propose a methodology and a t...
Mirjana Mazuran, Elisa Quintarelli, Rosalba Rossat...
CCS
2001
ACM
15 years 11 months ago
Dynamic Self-Checking Techniques for Improved Tamper Resistance
We describe a software self-checking mechanism designed to improve the tamper resistance of large programs. The mechanism consists of a number of testers that redundantly test for ...
Bill G. Horne, Lesley R. Matheson, Casey Sheehan, ...
DATE
2000
IEEE
85views Hardware» more  DATE 2000»
15 years 11 months ago
All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses
This paper proposes an all digital on-chip bus delay and crosstalk measurement methodology. A diagnosis procedure is derived to distinguish the delay faults in drivers, receivers,...
Chauchin Su, Yue-Tsang Chen, Mu-Jeng Huang, Gen-Na...
155
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AGENTS
2000
Springer
15 years 11 months ago
Design-to-Criteria Scheduling: Real-Time Agent Control
Design-to-Criteria builds custom schedules for agents that meet hard temporal constraints, hard resource constraints, and soft constraints stemming from soft task interactions or ...
Thomas Wagner, Victor R. Lesser