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ISCAS
2006
IEEE
97views Hardware» more  ISCAS 2006»
16 years 19 days ago
A zero-skipping multi-symbol CAVLC decoder for MPEG-4 AVC/H.264
—This paper presents a high-performance CAVLC decoding VLSI architecture for MPEG-4 AVC/H.264. Instead of just skipping zero block, the proposed design explores the features of C...
Guo-Shiuan Yu, Tian-Sheuan Chang
RTAS
2005
IEEE
16 years 6 days ago
Applying Sensitivity Analysis in Real-Time Distributed Systems
During real-world design of embedded real-time systems, it cannot be expected that all performance data required for scheduling analysis is fully available up front. In such situa...
Razvan Racu, Marek Jersak, Rolf Ernst
166
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ISCAS
2002
IEEE
114views Hardware» more  ISCAS 2002»
15 years 11 months ago
Concept of frequency-transconductance tuning of bipolar voltage-controlled oscillators
Due to technology limitations as well as stringent operating conditions that are imposed, the design of fully integrated analog RF front-end circuits is aimed at the edge of the r...
Aleksandar Tasic, Wouter A. Serdijn
KBSE
1999
IEEE
15 years 11 months ago
Towards Adaptive Web Agents
There is an increasingly large demand for software systems which are able to operate effectively in dynamic environments. In such environments, automated software engineering is e...
J. William Murdock, Ashok K. Goel
ICCAD
1994
IEEE
137views Hardware» more  ICCAD 1994»
15 years 10 months ago
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
Claudionor José Nunes Coelho Jr., Giovanni ...