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IPPS
2005
IEEE
16 years 5 days ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
ISCAS
2005
IEEE
156views Hardware» more  ISCAS 2005»
16 years 5 days ago
Optimal 2 sub-bank memory architecture for bit plane coder of JPEG2000
—JPEG2000 image compression standard is designed to cater the needs of a large span of applications including numerous consumer products. However, its use is still restricted due...
Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubm...
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
16 years 5 days ago
HIBI-based multiprocessor SoC on FPGA
Abstract — FPGAs offer excellent platform for System-onChips consisting of Intellectual Property (IP) blocks. The problem is that IP blocks and their interconnections are often F...
Erno Salminen, Ari Kulmala, Timo D. Hämä...
ISCAS
2005
IEEE
166views Hardware» more  ISCAS 2005»
16 years 5 days ago
Extending SystemC to support mixed discrete-continuous system modeling and simulation
—Systems on chip are more and more heterogeneous and include software, analog/RF and digital hardware, and non-electronic components such as sensors or actuators. The design and ...
Alain Vachoux, Christoph Grimm, Karsten Einwich
ISCC
2005
IEEE
16 years 5 days ago
Towards Flexible Authorization Management
During the last years there have been a lot of proposals in the literature for systems that attempt to manage the process of trust establishment. However, the engineering details ...
Patroklos G. Argyroudis, Donal O'Mahony