The instruction queue is a critical component and performance bottleneck in superscalar microprocessors. Conventional designs use physical register identifiers to wake up instruct...
In this paper, we present our vision for a framework to facilitate computationally-based aerospace vehicle design by improving the quality of the response surfaces that can be deve...
David Thompson, Srinivasan Parthasarathy, Raghu Ma...
There are many diverse algorithms for generating a first mesh, refining it and improving it. A tool that allows us to interchange these algorithms according to the requirements ...
The process of design search and optimisation is characterised by its computationally intensive operations, which produce a problem well suited to Grid computing. Here we present a...
Gang Xue, Matt J. Fairman, Graeme E. Pound, Simon ...
In this paper, an internal design model called FunState (functions driven by state machines) is presented that enables the representation of different types of system components a...