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ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
15 years 11 months ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...
OOPSLA
2010
Springer
15 years 5 months ago
Concurrency by modularity: design patterns, a case in point
General purpose object-oriented programs typically aren’t embarrassingly parallel. For these applications, finding enough concurrency remains a challenge in program design. To ...
Hridesh Rajan, Steven M. Kautz, Wayne Rowcliffe
WWW
2004
ACM
16 years 7 months ago
Web engineering with the visual software circuit board
The Visual Software Circuit Board (VSCB) platform supports a component based development methodology towards the development of software systems. The circuit board design techniqu...
Hovhannes Avoyan, Barry Levine
GI
2004
Springer
15 years 12 months ago
Towards a Framework and a Design Methodology for Autonomic Integrated Systems
: The transition from microelectronics to nanoelectronics reaches physical limits and results in a paradigm shift in the design and fabrication of electronic circuits. The conserva...
Andreas Herkersdorf, Wolfgang Rosenstiel
DAC
2001
ACM
16 years 7 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...