Sciweavers

1691 search results - page 85 / 339
» Designing communication strategies for heterogeneous paralle...
Sort
View
IPPS
2007
IEEE
16 years 17 days ago
Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
Ge Gan, Ziang Hu, Juan del Cuvillo, Guang R. Gao
ACSD
2009
IEEE
139views Hardware» more  ACSD 2009»
16 years 1 months ago
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...
Stephen B. Furber, Andrew D. Brown
FTCS
1996
110views more  FTCS 1996»
15 years 7 months ago
Experimental Assessment of Parallel Systems
In the research reported in this paper, transient faults were injected in the nodes and in the communication subsystem (by using software fault injection) of a commercial parallel...
João Gabriel Silva, Joao Carreira, Henrique...
INFOCOM
2011
IEEE
14 years 9 months ago
BodyT2: Throughput and time delay performance assurance for heterogeneous BSNs
—Body sensor networks (BSNs) have been developed for a set of performance-critical applications, including smart healthcare, assisted living, emergency response, athletic perform...
Zhen Ren, Gang Zhou, Andrew Pyles, Matthew Keally,...
PET
2010
Springer
15 years 10 months ago
Drac: An Architecture for Anonymous Low-Volume Communications
We present Drac, a system designed to provide anonymity and unobservability for real-time instant messaging and voice-over-IP communications against a global passive adversary. The...
George Danezis, Claudia Díaz, Carmela Tronc...