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VLSISP
1998
128views more  VLSISP 1998»
15 years 6 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian
ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
16 years 3 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
LAWEB
2005
IEEE
16 years 1 days ago
A Parallel Search Engine with BSP
With the technology advance and the growth of Internet, the information that can be found in this net, as well as the number of users that access to look for specific data is big...
Veronica Gil Costa, Mauricio Marín
CCGRID
2008
IEEE
16 years 28 days ago
An Autonomic Workflow Management System for Global Grids
Workflow Management System is generally utilized to define, manage and execute workflow applications on Grid resources. However, the increasing scale complexity, heterogeneity and...
Mustafizur Rahman 0003, Rajkumar Buyya
ASAP
2004
IEEE
171views Hardware» more  ASAP 2004»
15 years 10 months ago
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
In this paper, we present a modular co-synthesis framework called CHARMED that solves the problem of hardware-software co-synthesis of periodic, multi-mode, distributed, embedded ...
Vida Kianzad, Shuvra S. Bhattacharyya