2945 search results - page 447 / 589 » Designing and Implementing Malicious Hardware |
146
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ISCA
2006
IEEE
16 years 14 days ago
2006
IEEE
A simple and low-cost approach to supporting snoopy cache coherence is to logically embed a unidirectional ring in the network of a multiprocessor, and use it to transfer snoop me...
152
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ISCAS
2006
IEEE
16 years 14 days ago
2006
IEEE
In this paper a 173-bit type II ONB ECC processor Section II introduces the mathematical backgrounds for for inductive RFID applications is described. Compared with curve operation...
165
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MICRO
2006
IEEE
16 years 14 days ago
2006
IEEE
One of the main challenges of modern processor design is the implementation of a scalable and efficient mechanism to detect memory access order violations as a result of out-of-o...
170
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ASPDAC
2006
ACM
16 years 12 days ago
2006
ACM
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
170
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DATE
2005
IEEE
16 years 2 days ago
2005
IEEE
— With increasing process fluctuations in nano-scale technology, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. Desig...