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DAMON
2007
Springer
16 years 19 days ago
In-memory grid files on graphics processors
Recently, graphics processing units, or GPUs, have become a viable alternative as commodity, parallel hardware for generalpurpose computing, due to their massive data-parallelism,...
Ke Yang, Bingsheng He, Rui Fang, Mian Lu, Naga K. ...
FPL
2007
Springer
100views Hardware» more  FPL 2007»
16 years 18 days ago
Clock-Aware Placement for FPGAs
The programmable clock networks in FPGAs have a significant impact on overall power, area, and delay. Not only does the clock network itself dissipate a significant amount of powe...
Julien Lamoureux, Steven J. E. Wilton
APCCAS
2006
IEEE
258views Hardware» more  APCCAS 2006»
16 years 15 days ago
A 12-bit CMOS Current Steering D/A Converter for Embedded Systems
Abstract - This paper describes the design of a 12-bit digital-to-analog converter for a wireline modem chip implemented in a 0.13tm digital CMOS technology. Transistor-level simul...
Jesús Ruiz-Amaya, Manuel Delgado-Restituto,...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
16 years 15 days ago
Equivalence verification of arithmetic datapaths with multiple word-length operands
Abstract: This paper addresses the problem of equivalence verification of RTL descriptions that implement arithmetic computations (add, mult, shift) over bitvectors that have di...
Namrata Shekhar, Priyank Kalla, Florian Enescu
FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
16 years 15 days ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk