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DATE
2009
IEEE
118views Hardware» more  DATE 2009»
16 years 1 months ago
Limiting the number of dirty cache lines
Abstract—Caches often employ write-back instead of writethrough, since write-back avoids unnecessary transfers for multiple writes to the same block. For several reasons, however...
Pepijn J. de Langen, Ben H. H. Juurlink
DATE
2009
IEEE
73views Hardware» more  DATE 2009»
16 years 1 months ago
A study of the Single Event Effects impact on functional mapping within Flash-based FPGAs
—Flash-based FPGAs are increasingly demanded in safety critical fields, in particular space and avionic ones, due to their non-volatile configuration memory. Although they are al...
Francesco Abate, Luca Sterpone, Massimo Violante, ...
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
16 years 1 months ago
MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues
—Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced i...
Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuy...
DATE
2008
IEEE
85views Hardware» more  DATE 2008»
16 years 28 days ago
Video Processing Requirements on SoC Infrastructures
Applications from the embedded consumer domain put challenging requirements on SoC infrastructures, i.e. interconnect and memory. Specifically, video applications demand large sto...
Pieter van der Wolf, Tomas Henriksson
DATE
2008
IEEE
99views Hardware» more  DATE 2008»
16 years 28 days ago
Thermal Balancing Policy for Streaming Computing on Multiprocessor Architectures
As feature sizes decrease, power dissipation and heat generation density exponentially increase. Thus, temperature gradients in Multiprocessor Systems on Chip (MPSoCs) can serious...
Fabrizio Mulas, Michele Pittau, Marco Buttu, Salva...