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ISCAS
2005
IEEE
148views Hardware» more  ISCAS 2005»
16 years 1 days ago
Clock and data recovery with adaptive loop gain for spread spectrum SerDes applications
—A novel clock and data recovery architecture with adaptive loop gain is proposed for spread spectrum SerDes applications such as the Serial AT Attachment. The proposed design co...
Ming-Ta Hsieh, Gerald E. Sobelman
FPL
2005
Springer
114views Hardware» more  FPL 2005»
15 years 12 months ago
Measuring and Utilizing the Correlation Between Signal Connectivity and Signal Positioning for FPGAs Containing Multi-Bit Buildi
As the logic capacity of FPGA increases, there has been a corresponding increase in the variety of FPGA building blocks. From a mere collection of the conventional logic blocks, F...
Andy Gean Ye, Jonathan Rose
FPL
2004
Springer
101views Hardware» more  FPL 2004»
15 years 12 months ago
The Chess Monster Hydra
Abstract. With the help of the FPGA technology, the boarder between hardand software has vanished. It is now possible to develop complex designs and fine grained parallel applicat...
Chrilly Donninger, Ulf Lorenz
MSE
2003
IEEE
104views Hardware» more  MSE 2003»
15 years 11 months ago
Internet-based Tool for System-on-Chip Integration
A tool has been created for use in a design course to automate integration of new components into a SystemOn-Chip (SoC). Students used this tool to implement a complete SoC Intern...
David Lim, Christopher E. Neely, Christopher K. Zu...
GLVLSI
2002
IEEE
106views VLSI» more  GLVLSI 2002»
15 years 11 months ago
A low power direct digital frequency synthesizer with 60 dBc spectral purity
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
J. M. Pierre Langlois, Dhamin Al-Khalili