2945 search results - page 435 / 589 » Designing and Implementing Malicious Hardware |
177
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FC
1997
Springer
15 years 10 months ago
1997
Springer
Abstract. SPEED is a private key block cipher. It supports three variable parameters: (1) data length — the length of a plaintext/ciphertext of SPEED can be 64, 128 or 256 bits. ...
179
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CASES
2008
ACM
15 years 8 months ago
2008
ACM
fficient Programming Abstractions for Heterogeneous Multicore Systems on Chip Alastair D. Reid Krisztian Flautner Edmund Grimley-Evans ARM Ltd Yuan Lin University of Michigan The ...
189
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ISCA
2007
IEEE
16 years 23 days ago
2007
IEEE
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
166
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MICRO
2005
IEEE
16 years 1 days ago
2005
IEEE
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
154
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FP
1989
15 years 10 months ago
1989
This paper reports an explanation of an intricate algorithm in the terms of a potentially mechanisable rigorous-development method. It uses notations and techniques of Sheeran 1] ...