2945 search results - page 423 / 589 » Designing and Implementing Malicious Hardware |
165
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VLSI
2007
Springer
16 years 18 days ago
2007
Springer
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
144
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ISCAS
2006
IEEE
16 years 15 days ago
2006
IEEE
— This paper presents a novel Ternary More, Less and Equality (MLE) Circuit implemented with Recharged SemiFloating Gate Transistors. The circuit is a ternary application, and te...
165
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ISCAS
2006
IEEE
16 years 15 days ago
2006
IEEE
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...
104
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ISCAS
2006
IEEE
16 years 15 days ago
2006
IEEE
— We designed and fabricated a 4-channels digital isolation amplifier in a 0.5µm Silicon-on-Sapphire technology. The isolation device was fabricated on a single die, taking adv...
121
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ISCAS
2006
IEEE
16 years 15 days ago
2006
IEEE
— By implementing an FPGA-based simulator, we investigate the performance of high-rate quasi-cyclic (QC) LDPC codes for the magnetic recording channel at very low sector error ra...