2945 search results - page 422 / 589 » Designing and Implementing Malicious Hardware |
158
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ISCAS
2007
IEEE
16 years 23 days ago
2007
IEEE
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
126
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ISCAS
2007
IEEE
16 years 23 days ago
2007
IEEE
—In the implementation of a few JPEG steganographic schemes such as OutGuess and F5, an additional JPEG compression may take place before data embedding. The effect of this recom...
168
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CHES
2007
Springer
16 years 20 days ago
2007
Springer
In recent years, IP protection of FPGA hardware designs has become a requirement for many IP vendors. In [34], Simpson and Schaumont proposed a fundamentally different approach to...
135
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OOPSLA
2007
Springer
16 years 19 days ago
2007
Springer
ose of the JVM is to abstract the Java language from the hardware and software platforms it runs on. For this reason, the JVM uses services offered by the host operating system in...
172
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PPAM
2007
Springer
16 years 18 days ago
2007
Springer
Real-time access to accurate and reliable timing information is necessary to profile scientific applications, and crucial as simulations become increasingly complex, adaptive, an...