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CHES
2005
Springer
96views Cryptology» more  CHES 2005»
16 years 1 days ago
The "Backend Duplication" Method
Abstract. Several types of logic gates suitable for leakage-proof computations have been put forward [1,2,3,4]. This paper describes a method, called “backend duplication” to a...
Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu,...
MEMOCODE
2003
IEEE
15 years 11 months ago
MoDe: A Method for System-Level Architecture Evaluation
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
Jan Romberg, Oscar Slotosch, Gabor Hahn
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 11 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
15 years 11 months ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel
CHES
2010
Springer
189views Cryptology» more  CHES 2010»
15 years 7 months ago
Quark: A Lightweight Hash
The need for lightweight (that is, compact, low-power, low-energy) cryptographic hash functions has been repeatedly expressed by application designers, notably for implementing RFI...
Jean-Philippe Aumasson, Luca Henzen, Willi Meier, ...