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DATE
2003
IEEE
69views Hardware» more  DATE 2003»
15 years 11 months ago
Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
Ulrich Seidl, Klaus Eckl, Frank M. Johannes
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
15 years 11 months ago
Power consumption of logic circuits in ambipolar carbon nanotube technology
Ambipolar devices have been reported in many technologies, including carbon nanotube field effect transistors (CNTFETs). The ambipolarity can be in-field controlled with a secon...
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De ...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
15 years 11 months ago
E-Design Based on the Reuse Paradigm
This paper gives an overview on a Virtual electronic component or IP (Intellectual Property) exchange infrastructure whose main components are a XML "well structured IP e-cat...
L. Ghanmi, A. Ghrab, M. Hamdoun, B. Missaoui, K. S...
SIGMETRICS
2010
ACM
223views Hardware» more  SIGMETRICS 2010»
15 years 11 months ago
Self-synchronizing properties of CSMA wireless multi-hop networks
We show that CSMA is able to spontaneously synchronize transmissions in a wireless network with constant-size packets, and that this property can be used to devise efficient synch...
Kuang Xu, Olivier Dousse, Patrick Thiran
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 11 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi