2945 search results - page 384 / 589 » Designing and Implementing Malicious Hardware |
152
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
If motion estimation can choose the most suitable algorithm according to the changing characteristics of input image signals, we can get benefits, which improve quality and perfor...
219
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
— Run-time Active Leakage Reduction (RALR) is a recent technique and aims at aggressively reducing leakage power consumption. This paper studies the feasibility of RALR from the ...
145
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ICCD
2005
IEEE
16 years 3 months ago
2005
IEEE
Cache memories are commonly implemented through multiple memory banks to improve bandwidth and latency. The early knowledge of the data cache bank that an instruction will access ...
166
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ICCD
2005
IEEE
16 years 3 months ago
2005
IEEE
FPGA logic densities continue to increase at a tremendous rate. This has had the undesired consequence of increased power density, which manifests itself as higher ondie temperatu...
153
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ICCD
2001
IEEE
16 years 3 months ago
2001
IEEE
Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Annealing is used, e.g., with the Sequence Pair representation, the typical choice o...