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» Designing and Implementing Malicious Hardware
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ICSE
2007
IEEE-ACM
16 years 6 months ago
Randomized Differential Testing as a Prelude to Formal Verification
Most flight software testing at the Jet Propulsion Laboratory relies on the use of hand-produced test scenarios and is executed on systems as similar as possible to actual mission...
Alex Groce, Gerard J. Holzmann, Rajeev Joshi
ICCD
2005
IEEE
108views Hardware» more  ICCD 2005»
16 years 3 months ago
Methods for Modeling Resource Contention on Simultaneous Multithreading Processors
Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and cache...
Tipp Moseley, Dirk Grunwald, Joshua L. Kihm, Danie...
157
Voted
FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
16 years 3 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
16 years 1 months ago
A highly resilient routing algorithm for fault-tolerant NoCs
Current trends in technology scaling foreshadow worsening transistor reliability as well as greater numbers of transistors in each system. The combination of these factors will so...
David Fick, Andrew DeOrio, Gregory K. Chen, Valeri...
DATE
2008
IEEE
79views Hardware» more  DATE 2008»
16 years 1 months ago
System Performance Optimization Methodology for Infineon's 32-Bit Automotive Microcontroller Architecture
Microcontrollers are the core part of automotive Electronic Control Units (ECUs). A significant investment of the ECU manufacturers and even their customers is linked to the speci...
Albrecht Mayer, Frank Hellwig