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ISCAS
2006
IEEE
102views Hardware» more  ISCAS 2006»
16 years 19 days ago
A low power merge cell processor for real-time spike sorting in implantable neural prostheses
Extremely low power consumption is the critical constraint for designing implantable neural decoders that inter- Desired face directly with the nervous system. Typically a system w...
M. D. Linderman, T. H. Meng
CODES
2005
IEEE
16 years 7 days ago
Microcoded coprocessor for embedded secure biometric authentication systems
We design and implement a cryptographic biometric authentication system using a microcoded architecture. The secure properties of the biometric matching process are obtained by me...
Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhe...
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ISCAS
2005
IEEE
196views Hardware» more  ISCAS 2005»
16 years 6 days ago
An interference rejection filter for an ultra-wideband quadrature downconversion autocorrelation receiver
—An analog filter is designed based upon the requirement of an interference rejection filter for the Quadrature Downconversion Autocorrelation Receiver (QDAR). The transfer funct...
Sumit Bagga, Sandro A. P. Haddad, Koen van Harting...
ISCAS
2005
IEEE
124views Hardware» more  ISCAS 2005»
16 years 6 days ago
Parallel FFT computation with a CDMA-based network-on-chip
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
Daewook Kim, Manho Kim, Gerald E. Sobelman
EMSOFT
2005
Springer
16 years 4 days ago
SHIM: a deterministic model for heterogeneous embedded systems
— Typical embedded hardware/software systems are implemented using a combination of C and an HDL such as Verilog. While each is well-behaved in isolation, combining the two gives...
Stephen A. Edwards, Olivier Tardieu