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ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
15 years 12 months ago
High-speed VLSI architecture for parallel Reed-Solomon decoder
—This paper presents high-speed parallel Reed–Solomon (RS) (255,239) decoder architecture using modified Euclidean algorithm for the high-speed multigigabit-per-second fiber op...
Hanho Lee
165
Voted
ISWC
2002
IEEE
15 years 11 months ago
Wearable Sensing to Annotate Meeting Recordings
We propose to use wearable computers and sensor systems to generate personal contextual annotations in audio visual recordings of meetings. In this paper we argue that such annota...
Nicky Kern, Gerhard Tröster, Bernt Schiele, H...
FCCM
2004
IEEE
136views VLSI» more  FCCM 2004»
15 years 10 months ago
The MOLEN Processor Prototype
We present a prototype design of the MOLEN polymorphic processor, a CCM based on the co-processor architectural paradigm. The Xilinx Virtex II Pro technology is used as a prototyp...
Georgi Kuzmanov, Georgi Gaydadjiev, Stamatis Vassi...
ESA
2006
Springer
109views Algorithms» more  ESA 2006»
15 years 10 months ago
Multiline Addressing by Network Flow
We consider an optimization problem arising in the design of controllers for OLED displays. Our objective is to minimize amplitude of the electrical current through the diodes whic...
Friedrich Eisenbrand, Andreas Karrenbauer, Martin ...
IJHPCA
2007
165views more  IJHPCA 2007»
15 years 6 months ago
High Performance Development for High End Computing With Python Language Wrapper (PLW)
This paper presents a design and implementation of a system that leverages interactive scripting environment to the needs of scientific computing. The system allows seamless tran...
Piotr Luszczek, Jack Dongarra