2945 search results - page 351 / 589 » Designing and Implementing Malicious Hardware |
138
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ASPDAC
2006
ACM
16 years 19 days ago
2006
ACM
— We have designed and implemented the LDPC decoder chip with memory-reduction method to achieve high-throughput and practical chip size. The decoder decodes (3,6)-2304bit regula...
122
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ASPDAC
2006
ACM
16 years 19 days ago
2006
ACM
- Timing closure in LSI design becomes more and more difficult. But the conventional interconnect RC extraction method have over-margins caused by its corner conditions settings. I...
100
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ISCAS
2005
IEEE
16 years 7 days ago
2005
IEEE
This paper presents an adaptive blind electronic equalization technique for fiber dispersion compensation. Constant-modulus blind adaptive algorithm is proposed to provide referen...
165
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ISLPED
2005
ACM
16 years 6 days ago
2005
ACM
A gated current-controlled oscillator (GCCO) based topology is used to implement a low-power multi-channel clock and data recovery (CDR) system in a 0.18um digital CMOS technology...
161
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COORDINATION
2004
Springer
16 years 1 days ago
2004
Springer
As a case study that illustrates our view on coordination and component-based software engineering, we present the design and implementation of a parallel constraint solver. The pa...