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ICCAD
1996
IEEE
140views Hardware» more  ICCAD 1996»
15 years 10 months ago
Register-transfer level estimation techniques for switching activity and power consumption
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
15 years 10 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick
ASYNC
2004
IEEE
98views Hardware» more  ASYNC 2004»
15 years 10 months ago
Synthesis of Speed Independent Circuits Based on Decomposition
This paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesi...
Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers
FPL
2010
Springer
180views Hardware» more  FPL 2010»
15 years 4 months ago
A Karatsuba-Based Montgomery Multiplier
Abstract--Modular multiplication of long integers is an important building block for cryptographic algorithms. Although several FPGA accelerators have been proposed for large modul...
Gary Chun Tak Chow, Ken Eguro, Wayne Luk, Philip L...
ISPASS
2010
IEEE
16 years 1 months ago
The Hadoop distributed filesystem: Balancing portability and performance
—Hadoop is a popular open-source implementation of MapReduce for the analysis of large datasets. To manage storage resources across the cluster, Hadoop uses a distributed user-le...
Jeffrey Shafer, Scott Rixner, Alan L. Cox