2945 search results - page 341 / 589 » Designing and Implementing Malicious Hardware |
169
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MSE
2000
IEEE
15 years 11 months ago
2000
IEEE
With continuous acceptance of World Wide Web (WWW) as a de facto standard for human-computer interaction and human-human communication, it is desirable to develop net-centric, mul...
175
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DATE
1999
IEEE
15 years 11 months ago
1999
IEEE
In the reuse domain, the necessity of finding a new, more suitable description language opposes the need to make reuse an accepted practice, and thus related to standards. This pa...
160
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ISLPED
1999
ACM
15 years 11 months ago
1999
ACM
This paper describes a new mixed-swing topology for dual-rail domino logic that results in a simultaneous energy and delay reduction. HSPICE simulation results for a 1-bit full ad...
162
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ISCA
1998
IEEE
15 years 11 months ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
146
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FPL
1997
Springer
15 years 10 months ago
1997
Springer
Abstract. Pipeline morphing is a simple but e ective technique for recon guring pipelined FPGA designs at run time. By overlapping computation and recon guration, the latency assoc...