2945 search results - page 311 / 589 » Designing and Implementing Malicious Hardware |
164
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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. Th...
207
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ASPDAC
2000
ACM
15 years 11 months ago
2000
ACM
Multilevel Fiduccia-Mattheyses MLFM hypergraph partitioning 3, 22, 24 is a fundamental optimization in VLSI CAD physical design. The leading implementation, hMetis 23 , has sinc...
171
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ISLPED
1997
ACM
15 years 11 months ago
1997
ACM
This paper presents the design of a low power spread spectrum correlator. We look at two major approaches and evaluate the best alternative for power reduction. We first consider...
195
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FPL
2008
Springer
15 years 8 months ago
2008
Springer
The phase detector is a main building block in phaselocked loop (PLL) applications. FPGAs permit the realtime implementation of the CORDIC algorithm which offers an efficient solu...
280
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VLSISP
2011
15 years 1 months ago
2011
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...