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ARC
2006
Springer
124views Hardware» more  ARC 2006»
15 years 10 months ago
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
Su-Shin Ang, George A. Constantinides, Peter Y. K....
CODES
2011
IEEE
14 years 6 months ago
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R....
EXPCS
2007
15 years 10 months ago
RiceNIC: a reconfigurable network interface for experimental research and education
The evaluation of new network server architectures is usually performed experimentally using either a simulator or a hardware prototype. Accurate simulation of the hardwaresoftwar...
Jeffrey Shafer, Scott Rixner
FPGA
2004
ACM
117views FPGA» more  FPGA 2004»
16 years 3 days ago
A magnetoelectronic macrocell employing reconfigurable threshold logic
In this paper, we introduce a reconfigurable fabric based around a new class of circuit element: the hybrid Hall effect (HHE) magnetoelectronic device. Because they incorporate a ...
Steve Ferrera, Nicholas P. Carter
146
Voted
GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
16 years 11 hour ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...