Sciweavers

2945 search results - page 300 / 589
» Designing and Implementing Malicious Hardware
Sort
View
ASAP
2004
IEEE
171views Hardware» more  ASAP 2004»
15 years 10 months ago
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
In this paper, we present a modular co-synthesis framework called CHARMED that solves the problem of hardware-software co-synthesis of periodic, multi-mode, distributed, embedded ...
Vida Kianzad, Shuvra S. Bhattacharyya
FPL
2000
Springer
130views Hardware» more  FPL 2000»
15 years 10 months ago
Area-Optimized Technology Mapping for Hybrid FPGAs
As integration levels in FPGA devices have increased over the past decade, the structure of programmable logic resources has become more diversified. Recently, Altera Corporation h...
Srini Krishnamoorthy, Sriram Swaminathan, Russell ...
ISLPED
1997
ACM
106views Hardware» more  ISLPED 1997»
15 years 10 months ago
Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
ISSS
1995
IEEE
121views Hardware» more  ISSS 1995»
15 years 10 months ago
A comprehensive estimation technique for high-level synthesis
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
Seong Yong Ohm, Fadi J. Kurdahi, Nikil Dutt, Min X...
ISLPED
2010
ACM
205views Hardware» more  ISLPED 2010»
15 years 7 months ago
Peak power modeling for data center servers with switched-mode power supplies
Accurately modeling server power consumption is critical in designing data center power provisioning infrastructure. However, to date, most research proposals have used average CP...
David Meisner, Thomas F. Wenisch