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FCCM
2007
IEEE
117views VLSI» more  FCCM 2007»
16 years 1 months ago
FPGA Acceleration of Gene Rearrangement Analysis
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
Jason D. Bakos
ICECCS
2007
IEEE
95views Hardware» more  ICECCS 2007»
16 years 1 months ago
A Formal Contract Language for Plugin-based Software Engineering
Abstract—Plugin-based application design has become increasingly popular in recent years, and has contributed to the success of a range of very different applications including ...
Jens Dietrich, John G. Hosking, Jonathan Giles
ISCAS
2007
IEEE
101views Hardware» more  ISCAS 2007»
16 years 1 months ago
Flexible and Cost Effective Transport Stream Processor for DTV
— A flexible transport stream processor for DTV which is also designed under cost-effective consideration is proposed in this paper. A RISC micro-controller is allocated as the ...
Chia-Liang Tsai, Shao-Yi Chien
ISQED
2007
IEEE
124views Hardware» more  ISQED 2007»
16 years 1 months ago
Multi-Dimensional Circuit and Micro-Architecture Level Optimization
This paper studies multi-dimensional optimization at both circuit and micro-architecture levels. By formulating and solving the optimization problem with conflicting design objec...
Zhenyu Qi, Matthew M. Ziegler, Stephen V. Kosonock...
FPL
2007
Springer
126views Hardware» more  FPL 2007»
16 years 27 days ago
A Time-Triggered Network-on-Chip
In this paper we propose a time-triggered network-onchip (NoC) for on-chip real-time systems. The NoC provides time predictable on- and off-chip communication, a mandatory feature...
Martin Schoeberl