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MICRO
1999
IEEE
108views Hardware» more  MICRO 1999»
15 years 11 months ago
Exploiting ILP in Page-based Intelligent Memory
This study compares the speed, area, and power of di erent implementations of Active Pages OCS98], an intelligent memory system which helps bridge the growing gap between processo...
Mark Oskin, Justin Hensley, Diana Keen, Frederic T...
WAN
1998
Springer
15 years 11 months ago
ParaStation User Level Communication
PULC is a user-level communication library for workstation clusters. PULC provides a multi-user, multi-programming communication library for user level communication on top of high...
Joachim M. Blum, Thomas M. Warschko, Walter F. Tic...
CSREAESA
2006
15 years 8 months ago
Delay-Reduced Combinational Logic Synthesis using Multiplexers
- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...
Rekha K. James, T. K. Shahana, K. Poulose Jacob, S...
JVM
2004
106views Education» more  JVM 2004»
15 years 8 months ago
Kernel Plugins: When a VM Is Too Much
This paper presents kernel plugins, a framework for dynamic kernel specialization inspired by ideas borrowed from virtualization research. Plugins can be created and updated inexp...
Ivan B. Ganev, Greg Eisenhauer, Karsten Schwan
ACMSE
2011
ACM
14 years 6 months ago
Targeting FPGA-based processors for an implementation-driven compiler construction course
This paper describes the adaptation of a modern compiler construction course to target an FPGA-based hardware platform used throughout our computer science curriculum. One of the ...
D. Brian Larkins, William M. Jones