2945 search results - page 289 / 589 » Designing and Implementing Malicious Hardware |
202
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CAV
2008
Springer
15 years 8 months ago
2008
Springer
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
170
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GLVLSI
2009
IEEE
15 years 10 months ago
2009
IEEE
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
158
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DATE
2006
IEEE
16 years 24 days ago
2006
IEEE
We present a de-layered protocol engine for termination of 40Gbps TCP connections using a reconfigurable FPGA silicon platform. This protocol engine is designed for a planned att...
169
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ISPD
2004
ACM
16 years 5 days ago
2004
ACM
This paper describes the structured ASIC technology and impacts to the implementation flow. With an optimized and programmable structure, the structured ASIC technology indeed int...
220
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MICRO
2003
IEEE
16 years 10 hour ago
2003
IEEE
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...