2945 search results - page 271 / 589 » Designing and Implementing Malicious Hardware |
165
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ACSD
2005
IEEE
16 years 11 days ago
2005
IEEE
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
163
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ACSD
2005
IEEE
16 years 11 days ago
2005
IEEE
The objective of this paper is to present how to design a system that can accommodate additional functionality with either no changes to the design or adding architectural modules...
184
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DSD
2010
IEEE
15 years 7 months ago
2010
IEEE
—Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtract...
162
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ISMVL
2006
IEEE
16 years 23 days ago
2006
IEEE
Abstract— This paper presents a novel voltage mode Balanced Ternary Adder (BTA), implemented with Recharged SemiFloating Gate Devices. By using balanced ternary notation, it poss...
175
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SACRYPT
2000
Springer
15 years 10 months ago
2000
Springer
The LILI-128 keystream generator is a LFSR based synchronous stream cipher with a 128 bit key. The design offers large period and linear complexity, and is resistant to currently ...