2945 search results - page 263 / 589 » Designing and Implementing Malicious Hardware |
170
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MSE
2003
IEEE
15 years 12 months ago
2003
IEEE
The increasing gap between design productivity and chip complexity, and emerging systems-on-a-chip (SoC) have led to the wide utilization of reusable intellectual property (IP) co...
146
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ISPD
2003
ACM
15 years 12 months ago
2003
ACM
In this paper we present the Gain-based Logic Block Array (GLA), a new via-programmable regular fabric. GLA is an array of Gainbased Logic Blocks (GLBs). The GLB is a semi-univers...
136
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
180
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ICCD
1997
IEEE
15 years 11 months ago
1997
IEEE
The goal of Intelligent RAM (IRAM) is to design a cost-effective computer by designing a processor in a memory fabrication process, instead of in a conventional logic fabrication ...
170
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AHS
2006
IEEE
15 years 10 months ago
2006
IEEE
Sharing Intellectual Property (IP) blocks in today's competitive market poses significant high security risks. In this paper, we present a tutorial for a watermarking approach...