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ITC
2000
IEEE
123views Hardware» more  ITC 2000»
15 years 11 months ago
Combinational logic synthesis for diversity in duplex systems
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
Subhasish Mitra, Edward J. McCluskey
FPL
1998
Springer
121views Hardware» more  FPL 1998»
15 years 11 months ago
Reconfigurable PCI-Bus Interface (RPCI)
In this paper the Peripheral Component Interface PCI is presented as a target/master reconfigurable interface, based on Programmable Logic Devices PLDs (the Field Programmable Gate...
A. Abo Shosha, P. Reinhart, F. Rongen
DAC
2002
ACM
16 years 7 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
IPPS
2008
IEEE
16 years 1 months ago
A Hybrid MPI design using SCTP and iWARP
Abstract— Remote Direct Memory Access (RDMA) and pointto-point network fabrics both have their own advantages. MPI middleware implementations typically use one or the other, howe...
Mike Tsai, Brad Penoff, Alan Wagner
DAC
2003
ACM
16 years 7 months ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...