2945 search results - page 220 / 589 » Designing and Implementing Malicious Hardware |
129
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
—We present an implementation of an algorithm for constructing provably fast circuits for a class of Boolean functions with input signals that have individual starting times. We ...
158
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AHS
2007
IEEE
16 years 29 days ago
2007
IEEE
This paper describes a new FPGA implementation of a system for evolutionary image filter design. Three parallel search algorithms are compared. An optimal mutation rate and the q...
141
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DATE
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper presents a methodology towards synthesis of high performance analog circuits. Layout parasitics are estimated and compensated during circuit sizing. Physical layout con...
165
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ISLPED
1999
ACM
15 years 11 months ago
1999
ACM
A recent trend in low power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs c...
173
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MICRO
1993
IEEE
15 years 10 months ago
1993
IEEE
In this paper, we present a novel mechanism that implements register renaming, dynamic speculation and precise interrupts. Renaming of registers is performed during the instructio...