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ICCD
2008
IEEE
160views Hardware» more  ICCD 2008»
16 years 3 months ago
Fast arbiters for on-chip network switches
— The need for efficient implementation of simple crossbar schedulers has increased in the recent years due to the advent of on-chip interconnection networks that require low la...
Giorgos Dimitrakopoulos, Nikos Chrysos, Costas Gal...
FCCM
2003
IEEE
210views VLSI» more  FCCM 2003»
15 years 12 months ago
Compact FPGA-based True and Pseudo Random Number Generators
Two FPGA based implementations of random number generators intended for embedded cryptographic applications are presented. The first is a true random number generator (TRNG) whic...
Kuen Hung Tsoi, K. H. Leung, Philip Heng Wai Leong
ITC
2003
IEEE
123views Hardware» more  ITC 2003»
15 years 12 months ago
A Comprehensive Approach to Assessing and Analyzing 1149.1 Test Logic
In this paper we introduce a tool which is capable of verifying an 1149.1 test logic implementation and its compliance to the IEEE 1149.1 Standard [1][2] while providing a precise...
Kevin Melocco, Hina Arora, Paul Setlak, Gary Kunse...
MSE
2003
IEEE
97views Hardware» more  MSE 2003»
15 years 12 months ago
Harnessing FPGAs for Computer Architecture Education
Computer architecture is often taught by having students use software to design and simulate individual pieces of a computer processor. We have developed a method that will take t...
Mark Holland, James Harris, Scott Hauck
SBCCI
2003
ACM
135views VLSI» more  SBCCI 2003»
15 years 12 months ago
Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Mauricio Ayala-Rincón, Rodrigo B. Nogueira,...