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FPL
2006
Springer
80views Hardware» more  FPL 2006»
15 years 10 months ago
A Compiler Intermediate Representation for Reconfigurable Fabrics
An intermediate representation (IR) is a central structure around which tools such as compilers and synthesis tools are built. In this paper we propose such an IR specifically des...
Zhi Guo, Walid A. Najjar
195
Voted
ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
15 years 11 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
DATE
2009
IEEE
249views Hardware» more  DATE 2009»
16 years 1 months ago
White box performance analysis considering static non-preemptive software scheduling
—In this paper, a novel approach for integrating static non-preemptive software scheduling in formal bottom-up performance evaluation of embedded system models is described. The ...
Alexander Viehl, Michael Pressler, Oliver Bringman...
ISCAS
1999
IEEE
206views Hardware» more  ISCAS 1999»
15 years 11 months ago
Transimpedance amplifier with differential photodiode current sensing
This paper presents a balanced receiver structure suitable for wireless infrared data communications. The receiver provides a fixed photodiode bias voltage with the use of a regul...
B. Zand, K. Phang, D. A. Johns
DATE
1997
IEEE
86views Hardware» more  DATE 1997»
15 years 10 months ago
Highly scalable parallel parametrizable architecture of the motion estimator
In this paper a parametrizable architecture of a motion estimator (ME) is presented. The ME is designed as a generic full pixel calculation module which can be adopted for di eren...
Radim Cmar, Serge Vernalde