2945 search results - page 207 / 589 » Designing and Implementing Malicious Hardware |
159
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
155
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
Abstract—Media processing systems often have limited resources and strict performance requirements. An implementation must meet those design constraints while minimizing resource...
133
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FPL
1995
Springer
15 years 10 months ago
1995
Springer
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
184
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DATE
2003
IEEE
15 years 12 months ago
2003
IEEE
Reflection and automated introspection of a design in system level design frameworks are seen as necessities for the CAD tools to manipulate the designs within the tools. These f...
193
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ISCA
2011
IEEE
14 years 10 months ago
2011
IEEE
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...