2945 search results - page 205 / 589 » Designing and Implementing Malicious Hardware |
157
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ACSD
2001
IEEE
15 years 10 months ago
2001
IEEE
One of the corner stones of formal methods is the notion traction enables analysis. By the construction of act model we can trade implementation detail for analytical power. The i...
169
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FPL
2000
Springer
15 years 10 months ago
2000
Springer
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
185
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
189
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ISCA
2007
IEEE
16 years 27 days ago
2007
IEEE
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
161
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...