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ISCAS
2007
IEEE
107views Hardware» more  ISCAS 2007»
16 years 26 days ago
Architecture Level Power-Performance Tradeoffs for Pipelined Designs
Abstract—This paper presents a method to investigate powerperformance tradeoffs in digital pipelined designs. The method is applied at the architectural level of the design. It w...
Haider Ali, Bashir M. Al-Hashimi
SIES
2009
IEEE
16 years 1 months ago
A flexible design flow for software IP binding in commodity FPGA
— Software intellectual property (SWIP) is a critical component of increasingly complex FPGA based system on chip (SOC) designs. As a result, developers want to ensure that their...
Michael Gora, Abhranil Maiti, Patrick Schaumont
MSS
2007
IEEE
91views Hardware» more  MSS 2007»
16 years 26 days ago
Attribute Storage Design for Object-based Storage Devices
As storage systems grow larger and more complex, the traditional block-based design of current disks can no longer satisfy workloads that are increasingly metadata intensive. A ne...
Ananth Devulapalli, Dennis Dalessandro, Pete Wycko...
ISCAS
2006
IEEE
106views Hardware» more  ISCAS 2006»
16 years 18 days ago
A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time
—This paper presents a Frequency-Estimation Algorithm for the ADPLL designs instead of traditional binary frequency-search algorithm. With the proposed ADPLL architecture and syn...
Chia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu
ASPDAC
2004
ACM
98views Hardware» more  ASPDAC 2004»
16 years 22 hour ago
Enabling on-chip diversity through architectural communication design
- In this paper, we explore a new concept, called on-chip diversity, and introduce a design methodology for such emerging systems. Simply speaking, on-chip diversity means mixing d...
Tudor Dumitras, Sam Kerner, Radu Marculescu