2945 search results - page 198 / 589 » Designing and Implementing Malicious Hardware |
182
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VTC
2008
IEEE
16 years 29 days ago
2008
IEEE
—The design of LTE turbo coding chain suitable for flexible parallel and pipelined hardware implementations is presented. The hierarchical data structure further offers an opport...
174
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ARC
2010
Springer
16 years 1 months ago
2010
Springer
This paper presents the design and FPGA-implementation of a sampler that is suited for sampling real-time events in embedded systems. Such sampling is useful, for example, to test ...
185
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ASPDAC
2005
ACM
15 years 8 months ago
2005
ACM
Abstract— As FPGA designs in 65nm are being explored, reducing leakage power becomes an important design issue. A significant portion of the FPGA leakage is expended in the unus...
172
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CODES
2005
IEEE
16 years 6 days ago
2005
IEEE
With growing system complexities, system-level communication design is becoming increasingly important and advanced, network-oriented communication architectures become necessary....
143
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ISCAS
2005
IEEE
16 years 5 days ago
2005
IEEE
— As across-chip wire delays exceed a clock cycle, interconnect pipelining becomes essential. However, the arbitrary insertion of flip-flops can change the differentials of lat...