2945 search results - page 197 / 589 » Designing and Implementing Malicious Hardware |
168
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ASAP
2006
IEEE
15 years 8 months ago
2006
IEEE
Several semi-parallel decoding architectures have been explored by researchers for the quasi-cyclic low density parity check (LDPC) codes. In these architectures, the reconfigurab...
160
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SAMOS
2007
Springer
16 years 21 days ago
2007
Springer
This paper presents an overview of trends in low power handset SDR implementations. With the market for SDR-enabled handsets expected to grow to 200M units by 2014, the barriers to...
180
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ISCA
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
120
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DATE
2007
IEEE
16 years 28 days ago
2007
IEEE
The old school of analog designers, exemplified by pioneer Bob Pease, is becoming an extinct species. But the demand for analog/mixed-signal IP blocks has never been greater, espe...
156
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IPPS
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...