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ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
16 years 4 hour ago
The design of a low power asynchronous multiplier
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
Yijun Liu, Stephen B. Furber
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
15 years 11 months ago
Pseudo-CMOS: A novel design style for flexible electronics
Flexible electronics have attracted much attention since they enable promising applications such as lowcost RFID tags and e-paper. Thin-film transistors (TFTs) are considered as ...
Tsung-Ching Huang, Kenjiro Fukuda, Chun-Ming Lo, Y...
ICCD
2006
IEEE
312views Hardware» more  ICCD 2006»
16 years 3 months ago
A Design Approach for Fine-grained Run-Time Power Gating using Locally Extracted Sleep Signals
— Leakage power dissipation becomes a dominant component in operation power in nanometer devices. This paper describes a design methodology to implement runtime power gating in a...
Kimiyoshi Usami, Naoaki Ohkubo
DATE
2005
IEEE
149views Hardware» more  DATE 2005»
16 years 6 days ago
A Public-Key Watermarking Technique for IP Designs
— Sharing IP blocks in today’s competitive market poses significant high security risks. Creators and owners of IP designs want assurances that their content will not be illeg...
Amr T. Abdel-Hamid, Sofiène Tahar, El Mosta...
DATE
2010
IEEE
169views Hardware» more  DATE 2010»
15 years 11 months ago
Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs
There is today little doubt on the fact that a high-performance and cost-effective Network-on-Chip can only be designed in 45nm and beyond under a relaxed synchronization assumpti...
Daniele Ludovici, Alessandro Strano, Georgi Nedelt...