- Each year tens of billions of Dollars are wasted by the microelectronics industry because of missed deadlines and delayed design projects. These delays are partially due to desig...
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
Application specific systems have potential for customization of design with a view to achieve a better costperformance-power trade-off. Such customization requires extensive de...
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
Luca P. Carloni, Kenneth L. McMillan, Alexander Sa...