2945 search results - page 170 / 589 » Designing and Implementing Malicious Hardware |
163
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CODES
1996
IEEE
15 years 10 months ago
1996
IEEE
The TaSCA environment for hardware/software co-design of control dominated systems implemented on a single chip includes a novel approach to the system exploration phase for the e...
197
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FDL
2003
IEEE
15 years 12 months ago
2003
IEEE
SystemC-Plus from the ODETTE project provides the ability to simulate and synthesise object-oriented specifications into hardware. The current ODETTE compiler translates each obj...
146
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DAC
1998
ACM
16 years 7 months ago
1998
ACM
Statistical analysis of bug discovery data is used in the software industry to check the quality of the testing process and estimate the reliability of the tested program. In this...
145
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DFT
2005
IEEE
16 years 5 days ago
2005
IEEE
SRAM-based Field Programmable Gate Arrays (FPGAs) are very susceptible to Single Event Upsets (SEUs) that may have dramatic effects on the circuits they implement. In this paper w...
142
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IOLTS
2006
IEEE
16 years 17 days ago
2006
IEEE
This paper describes a highly reliable digital circuit design method based on totally self checking blocks implemented in FPGAs. The bases of the self checking blocks are parity p...