Sciweavers

2945 search results - page 147 / 589
» Designing and Implementing Malicious Hardware
Sort
View
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
16 years 17 days ago
Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...
Tero Arpinen, Petri Kukkala, Erno Salminen, Marko ...
DATE
2007
IEEE
184views Hardware» more  DATE 2007»
16 years 25 days ago
New safety critical radio altimeter for airbus and related design flow
The latest generation of the ERT560 Digital Radio Altimeter (DRA) developed for the Airbus A380 is the result of Thales’ 40 years experience. Over 40,000 radio-altimeters have b...
D. Hairion, S. Emeriau, E. Combot, Michel Sarlotte
GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
16 years 25 days ago
Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor
LNS (logarithmic number system) arithmetic has the advantages of high-precision and high performance in complex function computation. However, the large hardware problem in LNS ad...
Chichyang Chen, Paul Chow
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
15 years 11 months ago
Virtual Compression through Test Vector Stitching for Scan Based Designs
We propose a technique for compressing test vectors. The technique reduces test application time and tester memory requirements by utilizing part of the predecessor response in co...
Wenjing Rao, Alex Orailoglu
EMSOFT
2005
Springer
15 years 12 months ago
A unified HW/SW interface model to remove discontinuities between HW and SW design
One major challenge in System-on-Chip (SoC) design is the definition and design of interfaces between hardware and software. Traditional ASIC designer and software designer model ...
Aimen Bouchhima, Xi Chen, Frédéric P...