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DATE
2008
IEEE
115views Hardware» more  DATE 2008»
16 years 29 days ago
Synthesizing Synchronous Elastic Flow Networks
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...
Greg Hoover, Forrest Brewer
EMSOFT
2009
Springer
16 years 1 months ago
Clock-driven distributed real-time implementation of endochronous synchronous programs
An important step in model-based embedded system design consists in mapping functional specifications and their tasks/operations onto execution architectures and their ressources...
Dumitru Potop-Butucaru, Robert de Simone, Yves Sor...
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
15 years 11 months ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien
LCN
2005
IEEE
16 years 2 days ago
Implementation and Performance Analysis of a Packet Scheduler on a Programmable Network Processor
— The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last deca...
Fariza Sabrina, Salil S. Kanhere, Sanjay Jha
FLAIRS
2003
15 years 7 months ago
Advantages of Brahms for Specifying and Implementing a Multiagent Human-Robotic Exploration System
We have developed a model-based, distributed architecture that integrates diverse components in a system designed for lunar and planetary surface operations: an astronaut’s spac...
William J. Clancey, Maarten Sierhuis, Charis Kaski...