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DAC
1999
ACM
16 years 7 months ago
A Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design
We propose a method for power optimization that considers glitch reduction by gate sizing based on the statistical estimation of glitch transitions. Our method reduces not only th...
Masanori Hashimoto, Hidetoshi Onodera, Keikichi Ta...
GECCO
2006
Springer
202views Optimization» more  GECCO 2006»
15 years 10 months ago
Human competitive security protocols synthesis
This poster paper outlines a method for a search based approach to the development of provably correct protocols. Categories and Subject Descriptors C.2.2 [Computer Communication ...
Hao Chen, John A. Clark, Jeremy Jacob
CEC
2010
IEEE
15 years 7 months ago
Two novel Ant Colony Optimization approaches for Bayesian network structure learning
Learning Bayesian networks from data is an N-P hard problem with important practical applications. Several researchers have designed algorithms to overcome the computational comple...
Yanghui Wu, John A. W. McCall, David W. Corne
ESA
2009
Springer
129views Algorithms» more  ESA 2009»
16 years 29 days ago
Dynamic vs. Oblivious Routing in Network Design
Consider the robust network design problem of finding a minimum cost network with enough capacity to route all traffic demand matrices in a given polytope. We investigate the impa...
Navin Goyal, Neil Olver, F. Bruce Shepherd
APSEC
2006
IEEE
16 years 14 days ago
Adopting Model-Driven Development for Integrated Services and Appliances in Home Network Systems
The technology of a home network system (HNS) allows integration of several kinds of home appliances to provide a user with value-added integrated services. Development of the int...
Hiroshi Igaki, Masahide Nakamura, Ken-ichi Matsumo...